Writing parallel applications is an arduous and non-trivial task, but also mandatory if one wants to explore the potential of modern multicore processors. This task becomes even harder as different computation devices, such as General Purpose Graphic Processing Units (GPGPUs) and Field Programmable Gate Arrays (FPGAs), are employed to build heterogeneous systems. This imposes new challenges to the scientific community: the creation of models and alternatives to ease parallelism exploitation by the average programmer, considering the peculiarities of the different computation devices. 

Another important aspect to consider, specially in applications that run on big systems and manipulate big datasets, is the tradeoff between moving data to a remote processing element to increase parallelism and computing things locally to reduce communication costs. Fog and in-situ computing intend to tackle this issue by adding computing capabilities to network devices (such as NICs, switches and routers), storage devices or even memory. Those "smart" devices would be able to perform part of the computation that would reduce data transmission over the network and data busses. This makes computing systems even more heterogeneous, intensifying the need of novel programming models.

MPP aims at bringing together researchers interested in presenting contributions to the evolution of existing models or in proposing novel ones, considering the trends on accelerator devices and fog/in-situ computing. MPP 2017 will be held in conjunction with the 29th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2017), at Campinas, São Paulo, Brazil. 

MPP invites authors to submit unpublished full papers on the subject. Submissions must be in English, 6 pages maximum, following the IEEE formatting guidelines. The 6-page limit includes references.