Impedance Analysis and Stability Optimization Based on Phase-Optimization PLL of VSC-HVDC Connected to Weak AC Grids
编号:80 访问权限:仅限参会人 更新:2020-11-11 12:09:32 浏览:160次 张贴报告

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摘要
Abstract—For voltage-source converter (VSC) based high-voltage direct-current (HVDC) connected to weak AC grids, the grid current control interacts with phase-locked loop (PLL) under weak grid, via point of common coupling (PCC) voltage. The high grid impedance can destabilize the grid current control loop and lead to sustained harmonic resonance or other instability problems. To mitigate this problem, a phase-optimized PLL (P-PLL) technique is proposed for VSC-HVDC connected to weak AC grids. Then, the small-signal output impedance models of VSC-HVDC connected to weak AC grids under based-PLL synchronous and based on P-PLL synchronous mode are derived in the synchronous reference (d-q) frame. On the basis of the work above, the impedance characteristics under PLL-based synchronous and based on P-PLL synchronous mode are analyzed. Results show that: Compared with PLL-based synchronous mode, the output impedance of VSC-HVDC has negative resistance in a very small frequency range, being of importance for grid-tied system stability. Finally, numeric simulations on Matlab/Simulink are conducted to validate the correctness of the proposed P-PLL synchronous mode.
关键词
VSC-HVDC, PLL, P-PLL, impedance, Nyquist stability
报告人
Kaikai Li
Xi'an Jiaotong University

稿件作者
Kaikai Li Xi'an Jiaotong University
Yongqing Meng Xi’an Jiaotong University
Haitao Zhang Xi'an Jiaotong University
Guohua Fang Xi'an Jiaotong University
Yichao Zou Xi'an Jiaotong University
Zhengchun Du Xi'an Jiaotong University
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重要日期
  • 会议日期

    10月21日

    2019

    10月24日

    2019

  • 10月13日 2019

    摘要录用通知日期

  • 10月13日 2019

    初稿截稿日期

  • 10月14日 2019

    初稿录用通知日期

  • 10月24日 2019

    注册截止日期

  • 10月29日 2019

    终稿截稿日期

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